#include <tamtypes.h>

Include dependency graph for smem.h:

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Macros
#define	SUB_VIRT_MEM 0xbc000000

Functions
u32	smem_read (void addr, void buf, u32 size)

u32	smem_write (void addr, void buf, u32 size)

Detailed Description

Sub-CPU memory interface.

Definition in file smem.h.

Macro Definition Documentation

◆ SUB_VIRT_MEM

#define SUB_VIRT_MEM 0xbc000000

IOP RAM is mysteriously mapped into EE HW space at this address. I first noticed it was used by SCE in the PS2/Linux kernel, where it's used in the USB core driver. It's also used in a few places in the EE kernel.

I'm not exactly sure how the mapping looks to the bus, reads and writes to it are extremely fast, and data width hasn't been a problem for me yet (so you can use memcpy(), and obviously 16-byte reads and writes work).

For writes to IOP address space, the data cache MUST be first written back with SyncDCache(). I don't why why it is required, but writes do not always seem to take place properly without it.

For the PlayStation 3, this window does not seem to be correctly emulated. Although its EE kernel appears to still uses it, homebrew software cannot seem to use this window properly.

Definition at line 36 of file smem.h.

Function Documentation

◆ smem_read()

u32 smem_read	(	void *	addr,
		void *	buf,
		u32	size
	)

Definition at line 21 of file smem.c.

 {
         DI();
         ee_kmode_enter();
  
         memcpy(buf, addr + SUB_VIRT_MEM, size);
  
         ee_kmode_exit();
         EI();
  
         return size;
 }

References DI, ee_kmode_enter(), ee_kmode_exit(), EI, and SUB_VIRT_MEM.

◆ smem_write()

u32 smem_write	(	void *	addr,
		void *	buf,
		u32	size
	)

Definition at line 34 of file smem.c.

 {
         DI();
         ee_kmode_enter();
  
         memcpy(addr + SUB_VIRT_MEM, buf, size);
  
         ee_kmode_exit();
         EI();
  
         return size;
 }