ps2sdk  1.1
A collection of Open Source libraries used for developing applications on Sony's PlayStation 2® (PS2).
ee_regs.h
Go to the documentation of this file.
1 
6 #ifndef __EE_REGS_H__
7 #define __EE_REGS_H__
8 
9 #include <tamtypes.h>
10 
11 #define A_EE_SBUS_REG_BASE (0x1000F200)
12 #define A_EE_PGIF_REG_BASE (0x1000F300)
13 
14 #define A_EE_T0_COUNT (0x10000000)
15 #define A_EE_T0_MODE (0x10000010)
16 #define A_EE_T0_COMP (0x10000020)
17 #define A_EE_T0_HOLD (0x10000030)
18 #define A_EE_T1_COUNT (0x10000800)
19 #define A_EE_T1_MODE (0x10000810)
20 #define A_EE_T1_COMP (0x10000820)
21 #define A_EE_T1_HOLD (0x10000830)
22 #define A_EE_T2_COUNT (0x10001000)
23 #define A_EE_T2_MODE (0x10001010)
24 #define A_EE_T2_COMP (0x10001020)
25 #define A_EE_T3_COUNT (0x10001800)
26 #define A_EE_T3_MODE (0x10001810)
27 #define A_EE_T3_COMP (0x10001820)
28 #define A_EE_IPU_CMD (0x10002000)
29 #define A_EE_IPU_CTRL (0x10002010)
30 #define A_EE_IPU_BP (0x10002020)
31 #define A_EE_IPU_TOP (0x10002030)
32 #define A_EE_GIF_CTRL (0x10003000)
33 #define A_EE_GIF_MODE (0x10003010)
34 #define A_EE_GIF_STAT (0x10003020)
35 #define A_EE_GIF_TAG0 (0x10003040)
36 #define A_EE_GIF_TAG1 (0x10003050)
37 #define A_EE_GIF_TAG2 (0x10003060)
38 #define A_EE_GIF_TAG3 (0x10003070)
39 #define A_EE_GIF_CNT (0x10003080)
40 #define A_EE_GIF_P3CNT (0x10003090)
41 #define A_EE_GIF_P3TAG (0x100030a0)
42 #define A_EE_VIF0_STAT (0x10003800)
43 #define A_EE_VIF0_FBRST (0x10003810)
44 #define A_EE_VIF0_ERR (0x10003820)
45 #define A_EE_VIF0_MARK (0x10003830)
46 #define A_EE_VIF0_CYCLE (0x10003840)
47 #define A_EE_VIF0_MODE (0x10003850)
48 #define A_EE_VIF0_NUM (0x10003860)
49 #define A_EE_VIF0_MASK (0x10003870)
50 #define A_EE_VIF0_CODE (0x10003880)
51 #define A_EE_VIF0_ITOPS (0x10003890)
52 #define A_EE_VIF0_ITOP (0x100038d0)
53 #define A_EE_VIF0_R0 (0x10003900)
54 #define A_EE_VIF0_R1 (0x10003910)
55 #define A_EE_VIF0_R2 (0x10003920)
56 #define A_EE_VIF0_R3 (0x10003930)
57 #define A_EE_VIF0_C0 (0x10003940)
58 #define A_EE_VIF0_C1 (0x10003950)
59 #define A_EE_VIF0_C2 (0x10003960)
60 #define A_EE_VIF0_C3 (0x10003970)
61 #define A_EE_VIF1_STAT (0x10003c00)
62 #define A_EE_VIF1_FBRST (0x10003c10)
63 #define A_EE_VIF1_ERR (0x10003c20)
64 #define A_EE_VIF1_MARK (0x10003c30)
65 #define A_EE_VIF1_CYCLE (0x10003c40)
66 #define A_EE_VIF1_MODE (0x10003c50)
67 #define A_EE_VIF1_NUM (0x10003c60)
68 #define A_EE_VIF1_MASK (0x10003c70)
69 #define A_EE_VIF1_CODE (0x10003c80)
70 #define A_EE_VIF1_ITOPS (0x10003c90)
71 #define A_EE_VIF1_BASE (0x10003ca0)
72 #define A_EE_VIF1_OFST (0x10003cb0)
73 #define A_EE_VIF1_TOPS (0x10003cc0)
74 #define A_EE_VIF1_ITOP (0x10003cd0)
75 #define A_EE_VIF1_TOP (0x10003ce0)
76 #define A_EE_VIF1_R0 (0x10003d00)
77 #define A_EE_VIF1_R1 (0x10003d10)
78 #define A_EE_VIF1_R2 (0x10003d20)
79 #define A_EE_VIF1_R3 (0x10003d30)
80 #define A_EE_VIF1_C0 (0x10003d40)
81 #define A_EE_VIF1_C1 (0x10003d50)
82 #define A_EE_VIF1_C2 (0x10003d60)
83 #define A_EE_VIF1_C3 (0x10003d70)
84 #define A_EE_VIF0_FIFO (0x10004000)
85 #define A_EE_VIF1_FIFO (0x10005000)
86 #define A_EE_GIF_FIFO (0x10006000)
87 #define A_EE_IPU_out_FIFO (0x10007000)
88 #define A_EE_IPU_in_FIFO (0x10007010)
89 #define A_EE_D0_CHCR (0x10008000)
90 #define A_EE_D0_MADR (0x10008010)
91 #define A_EE_D0_QWC (0x10008020)
92 #define A_EE_D0_TADR (0x10008030)
93 #define A_EE_D0_ASR0 (0x10008040)
94 #define A_EE_D0_ASR1 (0x10008050)
95 #define A_EE_D1_CHCR (0x10009000)
96 #define A_EE_D1_MADR (0x10009010)
97 #define A_EE_D1_QWC (0x10009020)
98 #define A_EE_D1_TADR (0x10009030)
99 #define A_EE_D1_ASR0 (0x10009040)
100 #define A_EE_D1_ASR1 (0x10009050)
101 #define A_EE_D2_CHCR (0x1000a000)
102 #define A_EE_D2_MADR (0x1000a010)
103 #define A_EE_D2_QWC (0x1000a020)
104 #define A_EE_D2_TADR (0x1000a030)
105 #define A_EE_D2_ASR0 (0x1000a040)
106 #define A_EE_D2_ASR1 (0x1000a050)
107 #define A_EE_D3_CHCR (0x1000b000)
108 #define A_EE_D3_MADR (0x1000b010)
109 #define A_EE_D3_QWC (0x1000b020)
110 #define A_EE_D4_CHCR (0x1000b400)
111 #define A_EE_D4_MADR (0x1000b410)
112 #define A_EE_D4_QWC (0x1000b420)
113 #define A_EE_D4_TADR (0x1000b430)
114 #define A_EE_D5_CHCR (0x1000c000)
115 #define A_EE_D5_MADR (0x1000C010)
116 #define A_EE_D5_QWC (0x1000C020)
117 #define A_EE_D6_CHCR (0x1000C400)
118 #define A_EE_D6_MADR (0x1000C410)
119 #define A_EE_D6_QWC (0x1000C420)
120 #define A_EE_D6_TADR (0x1000C430)
121 #define A_EE_D7_CHCR (0x1000C800)
122 #define A_EE_D7_MADR (0x1000C810)
123 #define A_EE_D7_QWC (0x1000C820)
124 #define A_EE_D8_CHCR (0x1000D000)
125 #define A_EE_D8_MADR (0x1000D010)
126 #define A_EE_D8_QWC (0x1000D020)
127 #define A_EE_D8_SADR (0x1000D080)
128 #define A_EE_D9_CHCR (0x1000D400)
129 #define A_EE_D9_MADR (0x1000D410)
130 #define A_EE_D9_QWC (0x1000D420)
131 #define A_EE_D9_TADR (0x1000D430)
132 #define A_EE_D9_SADR (0x1000D480)
133 #define A_EE_D_CTRL (0x1000e000)
134 #define A_EE_D_STAT (0x1000e010)
135 #define A_EE_D_PCR (0x1000e020)
136 #define A_EE_D_SQWC (0x1000e030)
137 #define A_EE_D_RBSR (0x1000e040)
138 #define A_EE_D_RBOR (0x1000e050)
139 #define A_EE_D_STADR (0x1000e060)
140 #define A_EE_I_STAT (0x1000f000)
141 #define A_EE_I_MASK (0x1000f010)
142 #define A_EE_SIO_LCR (0x1000F100)
143 #define A_EE_SIO_LSR (0x1000F110)
144 #define A_EE_SIO_IER (0x1000F120)
145 #define A_EE_SIO_ISR (0x1000F130)
146 #define A_EE_SIO_FCR (0x1000F140)
147 #define A_EE_SIO_BRC (0x1000F150)
148 #define A_EE_SIO_REG60 (0x1000F160)
149 #define A_EE_SIO_REG70 (0x1000F170)
150 #define A_EE_SIO_TXFIFO (0x1000F180)
151 #define A_EE_SIO_REG90 (0x1000F190)
152 #define A_EE_SIO_REGA0 (0x1000F1A0)
153 #define A_EE_SIO_REGB0 (0x1000F1B0)
154 #define A_EE_SIO_RXFIFO (0x1000F1C0)
155 #define A_EE_SBUS_MADDR (0x1000F200)
156 #define A_EE_SBUS_SADDR (0x1000F210)
157 #define A_EE_SBUS_MSFLAG (0x1000F220)
158 #define A_EE_SBUS_SMFLAG (0x1000F230)
159 #define A_EE_SBUS_REG40 (0x1000F240)
160 #define A_EE_SBUS_REG50 (0x1000F250)
161 #define A_EE_SBUS_REG60 (0x1000F260)
162 #define A_EE_SBUS_REG70 (0x1000F270)
163 #define A_EE_SBUS_REG80 (0x1000F280)
164 #define A_EE_SBUS_REG90 (0x1000F290)
165 #define A_EE_SBUS_REGA0 (0x1000F2A0)
166 #define A_EE_SBUS_REGB0 (0x1000F2B0)
167 #define A_EE_SBUS_REGC0 (0x1000F2C0)
168 #define A_EE_SBUS_REGD0 (0x1000F2D0)
169 #define A_EE_SBUS_REGE0 (0x1000F2E0)
170 #define A_EE_SBUS_REGF0 (0x1000F2F0)
171 #define A_EE_PGIF_GPU_STAT (0x1000F300)
172 #define A_EE_PGIF_REG10 (0x1000F310)
173 #define A_EE_PGIF_REG20 (0x1000F320)
174 #define A_EE_PGIF_REG30 (0x1000F330)
175 #define A_EE_PGIF_REG40 (0x1000F340)
176 #define A_EE_PGIF_REG50 (0x1000F350)
177 #define A_EE_PGIF_REG60 (0x1000F360)
178 #define A_EE_PGIF_REG70 (0x1000F370)
179 #define A_EE_PGIF_CFIFO_STAT (0x1000F380)
180 #define A_EE_PGIF_REG90 (0x1000F390)
181 #define A_EE_PGIF_REGA0 (0x1000F3A0)
182 #define A_EE_PGIF_REGB0 (0x1000F3B0)
183 #define A_EE_PGIF_CFIFO_DATA (0x1000F3C0)
184 #define A_EE_PGIF_REGD0 (0x1000F3D0)
185 #define A_EE_PGIF_REGE0 (0x1000F3E0)
186 #define A_EE_PGIF_REGF0 (0x1000F3F0)
187 #define A_EE_D_ENABLER (0x1000f520)
188 #define A_EE_D_ENABLEW (0x1000f590)
189 #define A_EE_GS_PMODE (0x12000000)
190 #define A_EE_GS_SMODE1 (0x12000010)
191 #define A_EE_GS_SMODE2 (0x12000020)
192 #define A_EE_GS_SRFSH (0x12000030)
193 #define A_EE_GS_SYNCH1 (0x12000040)
194 #define A_EE_GS_SYNCH2 (0x12000050)
195 #define A_EE_GS_SYNCV (0x12000060)
196 #define A_EE_GS_DISPFB1 (0x12000070)
197 #define A_EE_GS_DISPLAY1 (0x12000080)
198 #define A_EE_GS_DISPFB2 (0x12000090)
199 #define A_EE_GS_DISPLAY2 (0x120000a0)
200 #define A_EE_GS_EXTBUF (0x120000b0)
201 #define A_EE_GS_EXTDATA (0x120000c0)
202 #define A_EE_GS_EXTWRITE (0x120000d0)
203 #define A_EE_GS_BGCOLOR (0x120000e0)
204 #define A_EE_GS_CSR (0x12001000)
205 #define A_EE_GS_IMR (0x12001010)
206 #define A_EE_GS_BUSDIR (0x12001040)
207 
209 #define R_EE_T0_COUNT ((vu32 *) A_EE_T0_COUNT)
211 #define R_EE_T0_MODE ((vu32 *) A_EE_T0_MODE)
213 #define R_EE_T0_COMP ((vu32 *) A_EE_T0_COMP)
215 #define R_EE_T0_HOLD ((vu32 *) A_EE_T0_HOLD)
217 #define R_EE_T1_COUNT ((vu32 *) A_EE_T1_COUNT)
219 #define R_EE_T1_MODE ((vu32 *) A_EE_T1_MODE)
221 #define R_EE_T1_COMP ((vu32 *) A_EE_T1_COMP)
223 #define R_EE_T1_HOLD ((vu32 *) A_EE_T1_HOLD)
225 #define R_EE_T2_COUNT ((vu32 *) A_EE_T2_COUNT)
227 #define R_EE_T2_MODE ((vu32 *) A_EE_T2_MODE)
229 #define R_EE_T2_COMP ((vu32 *) A_EE_T2_COMP)
231 #define R_EE_T3_COUNT ((vu32 *) A_EE_T3_COUNT)
233 #define R_EE_T3_MODE ((vu32 *) A_EE_T3_MODE)
235 #define R_EE_T3_COMP ((vu32 *) A_EE_T3_COMP)
237 #define R_EE_IPU_CMD ((vu64 *) A_EE_IPU_CMD)
239 #define R_EE_IPU_CTRL ((vu32 *) A_EE_IPU_CTRL)
241 #define R_EE_IPU_BP ((vu32 *) A_EE_IPU_BP)
243 #define R_EE_IPU_TOP ((vu64 *) A_EE_IPU_TOP)
245 #define R_EE_GIF_CTRL ((vu32 *) A_EE_GIF_CTRL)
247 #define R_EE_GIF_MODE ((vu32 *) A_EE_GIF_MODE)
249 #define R_EE_GIF_STAT ((vu32 *) A_EE_GIF_STAT)
251 #define R_EE_GIF_TAG0 ((vu32 *) A_EE_GIF_TAG0)
253 #define R_EE_GIF_TAG1 ((vu32 *) A_EE_GIF_TAG1)
255 #define R_EE_GIF_TAG2 ((vu32 *) A_EE_GIF_TAG2)
257 #define R_EE_GIF_TAG3 ((vu32 *) A_EE_GIF_TAG3)
259 #define R_EE_GIF_CNT ((vu32 *) A_EE_GIF_CNT)
261 #define R_EE_GIF_P3CNT ((vu32 *) A_EE_GIF_P3CNT)
263 #define R_EE_GIF_P3TAG ((vu32 *) A_EE_GIF_P3TAG)
265 #define R_EE_VIF0_STAT ((vu32 *) A_EE_VIF0_STAT)
267 #define R_EE_VIF0_FBRST ((vu32 *) A_EE_VIF0_FBRST)
269 #define R_EE_VIF0_ERR ((vu32 *) A_EE_VIF0_ERR)
271 #define R_EE_VIF0_MARK ((vu32 *) A_EE_VIF0_MARK)
273 #define R_EE_VIF0_CYCLE ((vu32 *) A_EE_VIF0_CYCLE)
275 #define R_EE_VIF0_MODE ((vu32 *) A_EE_VIF0_MODE)
277 #define R_EE_VIF0_NUM ((vu32 *) A_EE_VIF0_NUM)
279 #define R_EE_VIF0_MASK ((vu32 *) A_EE_VIF0_MASK)
281 #define R_EE_VIF0_CODE ((vu32 *) A_EE_VIF0_CODE)
283 #define R_EE_VIF0_ITOPS ((vu32 *) A_EE_VIF0_ITOPS)
285 #define R_EE_VIF0_ITOP ((vu32 *) A_EE_VIF0_ITOP)
287 #define R_EE_VIF0_R0 ((vu32 *) A_EE_VIF0_R0)
289 #define R_EE_VIF0_R1 ((vu32 *) A_EE_VIF0_R1)
291 #define R_EE_VIF0_R2 ((vu32 *) A_EE_VIF0_R2)
293 #define R_EE_VIF0_R3 ((vu32 *) A_EE_VIF0_R3)
295 #define R_EE_VIF0_C0 ((vu32 *) A_EE_VIF0_C0)
297 #define R_EE_VIF0_C1 ((vu32 *) A_EE_VIF0_C1)
299 #define R_EE_VIF0_C2 ((vu32 *) A_EE_VIF0_C2)
301 #define R_EE_VIF0_C3 ((vu32 *) A_EE_VIF0_C3)
303 #define R_EE_VIF1_STAT ((vu32 *) A_EE_VIF1_STAT)
305 #define R_EE_VIF1_FBRST ((vu32 *) A_EE_VIF1_FBRST)
307 #define R_EE_VIF1_ERR ((vu32 *) A_EE_VIF1_ERR)
309 #define R_EE_VIF1_MARK ((vu32 *) A_EE_VIF1_MARK)
311 #define R_EE_VIF1_CYCLE ((vu32 *) A_EE_VIF1_CYCLE)
313 #define R_EE_VIF1_MODE ((vu32 *) A_EE_VIF1_MODE)
315 #define R_EE_VIF1_NUM ((vu32 *) A_EE_VIF1_NUM)
317 #define R_EE_VIF1_MASK ((vu32 *) A_EE_VIF1_MASK)
319 #define R_EE_VIF1_CODE ((vu32 *) A_EE_VIF1_CODE)
321 #define R_EE_VIF1_ITOPS ((vu32 *) A_EE_VIF1_ITOPS)
323 #define R_EE_VIF1_BASE ((vu32 *) A_EE_VIF1_BASE)
325 #define R_EE_VIF1_OFST ((vu32 *) A_EE_VIF1_OFST)
327 #define R_EE_VIF1_TOPS ((vu32 *) A_EE_VIF1_TOPS)
329 #define R_EE_VIF1_ITOP ((vu32 *) A_EE_VIF1_ITOP)
331 #define R_EE_VIF1_TOP ((vu32 *) A_EE_VIF1_TOP)
333 #define R_EE_VIF1_R0 ((vu32 *) A_EE_VIF1_R0)
335 #define R_EE_VIF1_R1 ((vu32 *) A_EE_VIF1_R1)
337 #define R_EE_VIF1_R2 ((vu32 *) A_EE_VIF1_R2)
339 #define R_EE_VIF1_R3 ((vu32 *) A_EE_VIF1_R3)
341 #define R_EE_VIF1_C0 ((vu32 *) A_EE_VIF1_C0)
343 #define R_EE_VIF1_C1 ((vu32 *) A_EE_VIF1_C1)
345 #define R_EE_VIF1_C2 ((vu32 *) A_EE_VIF1_C2)
347 #define R_EE_VIF1_C3 ((vu32 *) A_EE_VIF1_C3)
349 #define R_EE_VIF0_FIFO ((vu32 *) A_EE_VIF0_FIFO)
351 #define R_EE_VIF1_FIFO ((vu32 *) A_EE_VIF1_FIFO)
353 #define R_EE_GIF_FIFO ((vu32 *) A_EE_GIF_FIFO)
355 #define R_EE_IPU_out_FIFO ((vu32 *) A_EE_IPU_out_FIFO)
357 #define R_EE_IPU_in_FIFO ((vu32 *) A_EE_IPU_in_FIFO)
359 #define R_EE_D0_CHCR ((vu32 *) A_EE_D0_CHCR)
361 #define R_EE_D0_MADR ((vu32 *) A_EE_D0_MADR)
363 #define R_EE_D0_QWC ((vu32 *) A_EE_D0_QWC)
365 #define R_EE_D0_TADR ((vu32 *) A_EE_D0_TADR)
367 #define R_EE_D0_ASR0 ((vu32 *) A_EE_D0_ASR0)
369 #define R_EE_D0_ASR1 ((vu32 *) A_EE_D0_ASR1)
371 #define R_EE_D1_CHCR ((vu32 *) A_EE_D1_CHCR)
373 #define R_EE_D1_MADR ((vu32 *) A_EE_D1_MADR)
375 #define R_EE_D1_QWC ((vu32 *) A_EE_D1_QWC)
377 #define R_EE_D1_TADR ((vu32 *) A_EE_D1_TADR)
379 #define R_EE_D1_ASR0 ((vu32 *) A_EE_D1_ASR0)
381 #define R_EE_D1_ASR1 ((vu32 *) A_EE_D1_ASR1)
383 #define R_EE_D2_CHCR ((vu32 *) A_EE_D2_CHCR)
385 #define R_EE_D2_MADR ((vu32 *) A_EE_D2_MADR)
387 #define R_EE_D2_QWC ((vu32 *) A_EE_D2_QWC)
389 #define R_EE_D2_TADR ((vu32 *) A_EE_D2_TADR)
391 #define R_EE_D2_ASR0 ((vu32 *) A_EE_D2_ASR0)
393 #define R_EE_D2_ASR1 ((vu32 *) A_EE_D2_ASR1)
395 #define R_EE_D3_CHCR ((vu32 *) A_EE_D3_CHCR)
397 #define R_EE_D3_MADR ((vu32 *) A_EE_D3_MADR)
399 #define R_EE_D3_QWC ((vu32 *) A_EE_D3_QWC)
401 #define R_EE_D4_CHCR ((vu32 *) A_EE_D4_CHCR)
403 #define R_EE_D4_MADR ((vu32 *) A_EE_D4_MADR)
405 #define R_EE_D4_QWC ((vu32 *) A_EE_D4_QWC)
407 #define R_EE_D4_TADR ((vu32 *) A_EE_D4_TADR)
409 #define R_EE_D5_CHCR ((vu32 *) A_EE_D5_CHCR)
411 #define R_EE_D5_MADR ((vu32 *) A_EE_D5_MADR)
413 #define R_EE_D5_QWC ((vu32 *) A_EE_D5_QWC)
415 #define R_EE_D6_CHCR ((vu32 *) A_EE_D6_CHCR)
417 #define R_EE_D6_MADR ((vu32 *) A_EE_D6_MADR)
419 #define R_EE_D6_QWC ((vu32 *) A_EE_D6_QWC)
421 #define R_EE_D6_TADR ((vu32 *) A_EE_D6_TADR)
423 #define R_EE_D7_CHCR ((vu32 *) A_EE_D7_CHCR)
425 #define R_EE_D7_MADR ((vu32 *) A_EE_D7_MADR)
427 #define R_EE_D7_QWC ((vu32 *) A_EE_D7_QWC)
429 #define R_EE_D8_CHCR ((vu32 *) A_EE_D8_CHCR)
431 #define R_EE_D8_MADR ((vu32 *) A_EE_D8_MADR)
433 #define R_EE_D8_QWC ((vu32 *) A_EE_D8_QWC)
435 #define R_EE_D8_SADR ((vu32 *) A_EE_D8_SADR)
437 #define R_EE_D9_CHCR ((vu32 *) A_EE_D9_CHCR)
439 #define R_EE_D9_MADR ((vu32 *) A_EE_D9_MADR)
441 #define R_EE_D9_QWC ((vu32 *) A_EE_D9_QWC)
443 #define R_EE_D9_TADR ((vu32 *) A_EE_D9_TADR)
445 #define R_EE_D9_SADR ((vu32 *) A_EE_D9_SADR)
447 #define R_EE_D_CTRL ((vu32 *) A_EE_D_CTRL)
449 #define R_EE_D_STAT ((vu32 *) A_EE_D_STAT)
451 #define R_EE_D_PCR ((vu32 *) A_EE_D_PCR)
453 #define R_EE_D_SQWC ((vu32 *) A_EE_D_SQWC)
455 #define R_EE_D_RBSR ((vu32 *) A_EE_D_RBSR)
457 #define R_EE_D_RBOR ((vu32 *) A_EE_D_RBOR)
459 #define R_EE_D_STADR ((vu32 *) A_EE_D_STADR)
461 #define R_EE_I_STAT ((vu32 *) A_EE_I_STAT)
463 #define R_EE_I_MASK ((vu32 *) A_EE_I_MASK)
464 
465 
467 #define R_EE_SIO_LCR ((vu32 *) A_EE_SIO_LCR)
469 #define R_EE_SIO_LSR ((vu32 *) A_EE_SIO_LSR)
471 #define R_EE_SIO_IER ((vu32 *) A_EE_SIO_IER)
473 #define R_EE_SIO_ISR ((vu32 *) A_EE_SIO_ISR)
475 #define R_EE_SIO_FCR ((vu32 *) A_EE_SIO_FCR)
477 #define R_EE_SIO_BRC ((vu32 *) A_EE_SIO_BRC)
479 #define R_EE_SIO_REG60 ((vu8 *) A_EE_SIO_REG60)
481 #define R_EE_SIO_REG70 ((vu8 *) A_EE_SIO_REG70)
483 #define R_EE_SIO_TXFIFO ((vu8 *) A_EE_SIO_TXFIFO)
485 #define R_EE_SIO_REG90 ((vu8 *) A_EE_SIO_REG90)
487 #define R_EE_SIO_REGA0 ((vu8 *) A_EE_SIO_REGA0)
489 #define R_EE_SIO_REGB0 ((vu8 *) A_EE_SIO_REGB0)
491 #define R_EE_SIO_RXFIFO ((vu8 *) A_EE_SIO_RXFIFO)
492 
494 #define R_EE_SBUS_MADDR ((vu32 *) A_EE_SBUS_REG00)
496 #define R_EE_SBUS_SADDR ((vu32 *) A_EE_SBUS_REG10)
498 #define R_EE_SBUS_MSFLAG ((vu32 *) A_EE_SBUS_MSFLAG)
500 #define R_EE_SBUS_SMFLAG ((vu32 *) A_EE_SBUS_SMFLAG)
502 #define R_EE_SBUS_REG40 ((vu32 *) A_EE_SBUS_REG40)
504 #define R_EE_SBUS_REG50 ((vu32 *) A_EE_SBUS_REG50)
506 #define R_EE_SBUS_REG60 ((vu32 *) A_EE_SBUS_REG60)
508 #define R_EE_SBUS_REG70 ((vu32 *) A_EE_SBUS_REG70)
510 #define R_EE_SBUS_REG80 ((vu32 *) A_EE_SBUS_REG80)
512 #define R_EE_SBUS_REG90 ((vu32 *) A_EE_SBUS_REG90)
514 #define R_EE_SBUS_REGA0 ((vu32 *) A_EE_SBUS_REGA0)
516 #define R_EE_SBUS_REGB0 ((vu32 *) A_EE_SBUS_REGB0)
518 #define R_EE_SBUS_REGC0 ((vu32 *) A_EE_SBUS_REGC0)
520 #define R_EE_SBUS_REGD0 ((vu32 *) A_EE_SBUS_REGD0)
522 #define R_EE_SBUS_REGE0 ((vu32 *) A_EE_SBUS_REGE0)
524 #define R_EE_SBUS_REGF0 ((vu32 *) A_EE_SBUS_REGF0)
525 
527 #define R_EE_PGIF_GPU_STAT ((vu32 *) A_EE_PGIF_GPU_STAT)
529 #define R_EE_PGIF_REG10 ((vu32 *) A_EE_PGIF_REG10)
531 #define R_EE_PGIF_REG20 ((vu32 *) A_EE_PGIF_REG20)
533 #define R_EE_PGIF_REG30 ((vu32 *) A_EE_PGIF_REG30)
535 #define R_EE_PGIF_REG40 ((vu32 *) A_EE_PGIF_REG40)
537 #define R_EE_PGIF_REG50 ((vu32 *) A_EE_PGIF_REG50)
539 #define R_EE_PGIF_REG60 ((vu32 *) A_EE_PGIF_REG60)
541 #define R_EE_PGIF_REG70 ((vu32 *) A_EE_PGIF_REG70)
543 #define R_EE_PGIF_CFIFO_STAT ((vu32 *) A_EE_PGIF_CFIFO_STAT)
545 #define R_EE_PGIF_REG90 ((vu32 *) A_EE_PGIF_REG90)
547 #define R_EE_PGIF_REGA0 ((vu32 *) A_EE_PGIF_REGA0)
549 #define R_EE_PGIF_REGB0 ((vu32 *) A_EE_PGIF_REGB0)
551 #define R_EE_PGIF_CFIFO_DATA ((vu32 *) A_EE_PGIF_CFIFO_DATA)
553 #define R_EE_PGIF_REGD0 ((vu32 *) A_EE_PGIF_REGD0)
555 #define R_EE_PGIF_REGE0 ((vu32 *) A_EE_PGIF_REGE0)
557 #define R_EE_PGIF_REGF0 ((vu32 *) A_EE_PGIF_REGF0)
559 #define R_EE_D_ENABLER ((vu32 *) A_EE_D_ENABLER)
561 #define R_EE_D_ENABLEW ((vu32 *) A_EE_D_ENABLEW)
562 
563 /* EE GS Registers */
564 
566 #define R_EE_GS_PMODE ((vu64 *) A_EE_GS_PMODE)
568 #define R_EE_GS_SMODE1 ((vu64 *) A_EE_GS_SMODE1)
570 #define R_EE_GS_SMODE2 ((vu64 *) A_EE_GS_SMODE2)
572 #define R_EE_GS_SRFSH ((vu64 *) A_EE_GS_SRFSH)
574 #define R_EE_GS_SYNCH1 ((vu64 *) A_EE_GS_SYNCH1)
576 #define R_EE_GS_SYNCH2 ((vu64 *) A_EE_GS_SYNCH2)
578 #define R_EE_GS_SYNCV ((vu64 *) A_EE_GS_SYNCV)
580 #define R_EE_GS_DISPFB1 ((vu64 *) A_EE_GS_DISPFB1)
582 #define R_EE_GS_DISPLAY1 ((vu64 *) A_EE_GS_DISPLAY1)
584 #define R_EE_GS_DISPFB2 ((vu64 *) A_EE_GS_DISPFB2)
586 #define R_EE_GS_DISPLAY2 ((vu64 *) A_EE_GS_DISPLAY2)
588 #define R_EE_GS_EXTBUF ((vu64 *) A_EE_GS_EXTBUF)
590 #define R_EE_GS_EXTDATA ((vu64 *) A_EE_GS_EXTDATA)
592 #define R_EE_GS_EXTWRITE ((vu64 *) A_EE_GS_EXTWRITE)
594 #define R_EE_GS_BGCOLOR ((vu64 *) A_EE_GS_BGCOLOR)
596 #define R_EE_GS_CSR ((vu64 *) A_EE_GS_CSR)
598 #define R_EE_GS_IMR ((vu64 *) A_EE_GS_IMR)
600 #define R_EE_GS_BUSDIR ((vu64 *) A_EE_GS_BUSDIR)
601 
602 #define EE_CHCR_MOD_NORM (0)
603 #define EE_CHCR_MOD_CHAIN (1)
604 #define EE_CHCR_MOD_INTER (2)
605 
606 #define EE_CHCR_MOD (3 << 2)
607 #define EE_CHCR_ASP (3 << 4)
608 #define EE_CHCR_TTE (1 << 6)
609 #define EE_CHCR_TIE (1 << 7)
610 #define EE_CHCR_STR (1 << 8)
611 
612 #define EE_I_STAT_GS (1 << 0)
613 #define EE_I_STAT_SBUS (1 << 1)
614 #define EE_I_STAT_VSS (1 << 2)
615 #define EE_I_STAT_VSE (1 << 3)
616 
617 #endif /* __EE_REGS_H__ */